Brian Bailey

It's the only way to prove that a design is correct. Recent advances continue to make it better.

While everybody seems to agree that AI will disrupt semiconductor design and EDA tools, nobody has yet suggested what a disrupted flow would actually look like.

The evolution of verification may have slowed down, but the industry is hitting a tipping point that will drive some major changes. Can verification get ahead of the problem?

IP can no longer be developed and verified outside of the context of the system in which it is expected to operate — unless we develop new verification methodologies.

Timing is increasingly dependent on vectors. Can static techniques continue to deliver the necessary results? Maybe.

Design complexity may be growing faster than verification tools and methodologies are evolving. This is resulting in increased delays for chip success.

The economics associated with current AI development do not add up. Lots of money is spent, but little money is earned.

What we can learn from hallucinations, and where AI will fit into the chip design flow.

Nobody wants standards until the lack of them inhibits the development of the solutions that they need. That is often too late.

Does the world need another CPU architecture when that no longer reflects the typical workload? Perhaps not, but it may need a bridge to get to where it needs to be.